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mixed_signal
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mixed_signal [2017/04/25 00:52] vsaxena |
mixed_signal [2017/08/19 08:54] (current) vsaxena |
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| <code> | <code> | ||
| + | # NCSU Design Kit Path | ||
| + | CDK_DIR = "/home/vsaxena/pdk/ncsu-cdk-1.6.0.beta" | ||
| + | |||
| # Include basic Spectre and Verilog-A libraries | # Include basic Spectre and Verilog-A libraries | ||
| DEFINE basic $CDSDIR/tools/dfII/etc/cdslib/basic | DEFINE basic $CDSDIR/tools/dfII/etc/cdslib/basic | ||
| Line 29: | Line 32: | ||
| DEFINE bmslib $CDSDIR/tools/dfII/samples/artist/bmslib | DEFINE bmslib $CDSDIR/tools/dfII/samples/artist/bmslib | ||
| - | CDK_DIR = "/home/vsaxena/pdk/ncsu-cdk-1.6.0.beta" | ||
| # Include NCSU PDK | # Include NCSU PDK | ||
| DEFINE basic $CDK_DIR/lib/basic | DEFINE basic $CDK_DIR/lib/basic | ||
mixed_signal.1493081544.txt.gz · Last modified: 2017/04/25 00:52 by vsaxena
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