Cad Wiki for Analog IC Courses

analog

Anonymous (anonymous@undisclosed.example.com) — 2024-08-28T16:47:11+0000

Cadence Setup for CPEG 424/624: Analog IC Design Login to the ECE Linux VM cpeg424.ece.udel.edu using the VNC Client. Setting up the NCSU PDK 1) Open the .bashrc file in your home directory. If it doesn't exist already, then create one using a text editor such as gedit

cad_tutorials

Anonymous (anonymous@undisclosed.example.com) — 2024-06-11T01:15:46+0000

Cadence Video Tutorials [Cadence Bindkeys Cheat Sheet] NCSU PDK Design Rules (html site), (PDF doc) [ NCSU 180nm CMOS Process Data] ---------- Lab 1: Schematic Design and Simulation * Schematic Design: Resistor Divider. Spectre DC operating point analysis, annotating node voltages (10:33) * Schematic Design and Simulation: RC Circuit. Spectre AC and transient analysis (22:57) * Hierarchical Schematic Design: Ideal Opamp Modeling. Hierarchical design and simulation. (23:13)

cadence_faqs

Anonymous (anonymous@undisclosed.example.com) — 2021-11-03T22:02:43+0000

General Cadence FAQs Q. Why do we use Cadence and not any other software? A. Detailed answer is posted here. ---------- Q. My schematic and/or layout is locked up and I can't edit it. What should I do? A. In short, use clsAdminTool directly from command terminal. To remove ALL the edit locks in your directory tree, type

cadence_setup_for_advanced_vlsi_design_course

Anonymous (anonymous@undisclosed.example.com) — 2016-09-17T21:16:50+0000

Cadence setup for Advanced VLSI Design Course This course is planned but not currently offered.

cadence_setup_for_ece_5_411_-_cmos_analog_ic_design_course

Anonymous (anonymous@undisclosed.example.com) — 2016-09-17T21:16:50+0000

Cadence Setup for ECE 5/411 * The CMOS textbook uses 1um (long-channel) and 50n (short-channel) CMOS models. The additional problems from the CMOS book use these two models for the simulations. * For the course project and some HW problems, we will use a realistic TSMC 180n CMOS process. Since the PDK can't be made freely available, we will use NCSU library symbols in conjunction with the TSMC models.

cadence_setup_for_ece_5_417_-_mixed-signal_ic_design_course

Anonymous (anonymous@undisclosed.example.com) — 2017-03-03T03:53:40+0000

EDA Tools Setup for ECE 5/417: Mixed Signal IC Design Setting up NCSU Library 1) Goto your work directory. Better create a new directory for every course. cd ece517 2) Save backups of files cp .cdsinit .cdsinit_bkp cp cds.lib cds.lib_bkp

cadence_setup_for_ece_5_418_-_memory_clock_synchronization_ic_design_course

Anonymous (anonymous@undisclosed.example.com) — 2016-09-17T21:16:50+0000

Cadence Setup for ECE 5/418 - PLL IC Design Course * For the course project and some HW problems, we will use TSMC 180n CMOS process. Since the PDK can't be made freely available, we will use NCSU library symbols in conjunction with the TSMC models.

cadence_setup_for_ece_614_-_advanced_analog_ic_design_course

Anonymous (anonymous@undisclosed.example.com) — 2016-09-17T21:16:50+0000

Cadence setup for ECE 614 - Advanced Analog IC Design We will be using IBM 130n CMOS (8RF-DM) process for homeworks and projects in this course. Following steps are requires to get going with the PDK. * Sign the MOSIS NDA (Non-disclosure Agreement) with the instructor.

eecis_linux_account

Anonymous (anonymous@undisclosed.example.com) — 2021-08-31T04:20:28+0000

Request an EECIS User Account * Students need an EECIS account to access the Linux virtual machine (VM). You can apply here https://accounts.eecis.udel.edu/register/ * You should apply for an academic account and enlist Dr. Vishal Saxena as your sponsor. If you already have an EECIS account, you may skip this step.

eecis_troubleshooting

Anonymous (anonymous@undisclosed.example.com) — 2020-09-05T16:51:02+0000

Troubleshooting EECIS Linux Server Connectivity Password/Login Issues with the Linux Server Make sure you are using the EECIS login/password, not the UD password, and that you are connected using the VPN. The Linux server is managed by the ECE IT folks. You can post the issue as a ticket

first_time_cadence_setup_for_ece_5_410

Anonymous (anonymous@undisclosed.example.com) — 2019-01-09T03:24:13+0000

First time login into the AMS (Analog Mixed Signal Lab) servers Closely follow the following steps to setup Cadence for the ECE5/410 class: * Log into ams1 or ams2 servers using the directions here and open a terminal window. * Change your ams password by using the command

how_do_i_perform_stability_analysis

Anonymous (anonymous@undisclosed.example.com) — 2016-09-17T21:16:50+0000

Stability Analysis Single-ended loop * Use iprobe component in the library to break the loop at a convenient point (where the effect of loading can be ignored). The probe is closed for dc analysis and open for stb analysis, where an input signal is injected and the loop-response is obtained.

how_do_i_run_spectre_simulations_in_tmp_by_default

Anonymous (anonymous@undisclosed.example.com) — 2016-09-17T21:16:50+0000

How do I run spectre simulations in /tmp by default? It's important that you dump your simulation data in /tmp/simulation to avoid filling up your home directory and chocking your and possibly others' user accounts. If you have copied the right course setup directories, it should occur by default. Otherwise, add the following entry to your .cdsinit file in your wokr directory

how_do_i_set_up_the_spectre_models_for_c5_process

Anonymous (anonymous@undisclosed.example.com) — 2016-09-17T21:16:50+0000

How do I setup the Spectre models for On-Semi C5 process? The Spectre models for the OnSemi/AMI C5 0.5µm CMOS process are located at /home/pdks/ncsu-cdk-1.6.0.beta/models/spectre/standalone Select the models ami06N.m and ami06P.m in the ADE window models setup, before you attempt to run the simulation when designing with C5 process.

how_do_i_simulate_cmrr_and_psrr

Anonymous (anonymous@undisclosed.example.com) — 2016-09-17T21:16:50+0000

Opamp CMRR and PSRR simulation * For CMRR and PSRR, you can do this with an xf (Transfer Function) analysis available in Spectre. * Set up your testbench sources for the supplies (of course), but also a source representing the common mode voltage.

how_do_i_simulate_transient_noise

Anonymous (anonymous@undisclosed.example.com) — 2016-09-17T21:16:50+0000

Transient Noise Simulation Set the following parameters to calculate noise during a transient analysis. (For more detail on the transient noise parameters refer to the Virtuoso Spectre Circuit Simulator User Guide). noiseseed Seed for the random number generator (used by the simulator to vary the noise sources internally). Specifying the same seed allows you to reproduce a previous experiment. The default value is 1.

how_do_i_use_ade_xl_gxl_for_corner_simulations_and_parameter_sweeps

Anonymous (anonymous@undisclosed.example.com) — 2016-09-17T21:16:50+0000

ADE XL/GXL Tutorials Analog Design Environment XL Corners ADE XL - Parameterization ADE XL - Sweeps ADE XL - Setting up Specifications ADE XL - Specification Comparison Cadence Virtuoso Analog Design Environment -XL Test Setup

linux_faqs

Anonymous (anonymous@undisclosed.example.com) — 2020-10-06T05:06:58+0000

Linux FAQs Q. How do I change my directory permissions? A. Permissions are changed by the command chmod. To open read+write permissions to everyone to your user directory, start from your home directory: cd .. chmod -R 777 is your Linux username.

matlab_tutorials

Anonymous (anonymous@undisclosed.example.com) — 2016-09-17T21:16:50+0000

Matlab/Simulink Tutorials S Parameteric Models in Simulink using Matlab script

microelectronics

Anonymous (anonymous@undisclosed.example.com) — 2018-02-05T22:47:56+0000

Cadence Setup for ECE 310/311: Microelectronics Login to the ENGR server ece310.engr.uidaho.edu using the X2Go Client. Linux and Mac users can use ssh instead of the X2Go client. They can do this with ssh -XY [username]@ece310.engr.uidaho.edu

mixed_signal

Anonymous (anonymous@undisclosed.example.com) — 2017-08-19T08:54:30+0000

EDA Tools Setup for ECE 5/417: Mixed Signal IC Design Login to the ENGR server ece410.engr.uidaho.edu using X2Go Client. Setting up NCSU Library 1) Goto your work directory. Better create a new directory for every course. cd mkdir ece517 cd ece517

ncsu_180nm_process_info

Anonymous (anonymous@undisclosed.example.com) — 2020-09-03T13:59:02+0000

NCSU 180nm CMOS Process Data Process Design Rules We are using a 0.18 micron 6 Metal 1 Poly (1.8V) CMOS technology for chip layout. In PDK specific terms, we will use SUBM_DEEP design rules with lambda(λ) equal to 0.09 micro meters with Lmin=2λ. Note that this λ is not the channel length modulation parameter!

nomachine_4

Anonymous (anonymous@undisclosed.example.com) — 2016-09-17T21:16:50+0000

Using Nomachine for Remote Connections Nomachine Download We use Nomachine (aka NX) on the Windows PCs to remotely access the AMS Linux server cluster. Download and install the Windows Nomachine Client from here. Please follow the following steps to install and configure Nomachine on your Windows machine.

off-campus

Anonymous (anonymous@undisclosed.example.com) — 2024-08-31T00:41:25+0000

Access to Cadence Tools In order to use Cadence from outside the UD Campus, you will need to use VPN to access the ECE VMs (i.e. cpeg424.ece.udel.edu). If you are in the campus network, then skip the VPN setup. VPN Setup Follow these steps to setup your off-Campus Cadence access:

on-campus

Anonymous (anonymous@undisclosed.example.com) — 2020-09-24T03:49:43+0000

On-Campus Access to Cadence Tools * Some of the UD ECE labs have X2Go Clients installed on the desktops to remotely access the Linux servers. If you have a PC or laptop and are on the campus network you can proceed to install and use X2Go Client. * CPEG 424/624

on_semi_c5_process_information

Anonymous (anonymous@undisclosed.example.com) — 2019-02-02T06:05:59+0000

C5 Design Rules and Process Information * Design information for the C5 0.5u process is available here. * Use the MOSIS Scalable CMOS (SCMOS) SUBM design rules for your ece510 layouts. The design rules can be found in this document. Note that the design rules are given in terms of lambda (=0.3u) while Cadence Virtuoso uses absolute values without any scaling. Thus in your layouts, multiply all design rule numbers by 0.3u for final layout dimensions. Eg. the minimum N-well width of 12 trans…

opennx

Anonymous (anonymous@undisclosed.example.com) — 2016-09-17T21:16:50+0000

Open NX Client Download the client and follow the instructions from OpenNX Client.

pad_frame

Anonymous (anonymous@undisclosed.example.com) — 2020-12-12T04:57:30+0000

Using the Pad Frame A 24-pin Pad Frame has been created for your project layout. The pad frame and its cells are available in the pads_tsmc02d library on the linux server. Add the following lines to your cds.lib file. DEFINE pads_tsmc02d /usa/vsaxena/analog_course/pads_tsmc02d

pll_design_tutorial

Anonymous (anonymous@undisclosed.example.com) — 2016-09-17T21:16:50+0000

PLL Design Tutorial ---------- Simulink Simulation Setup Download the Mixed-Signal Library for Simulink and install using the directions given in the zip. The basic PLL examples are: ---------- Matlab files for PLL Design The cumulative MATLAB files archive developed during the PLL design course are

removing_cadence_lock_files

Anonymous (anonymous@undisclosed.example.com) — 2020-08-23T03:12:54+0000

Removing Cadence Lock Files What is a Lock File? When one opens up a cadence cell for editing (schematic, layout, symbol, etc), Cadence automatically creates a temporary file called a lock file. The lock file prevents another user from opening up the same file for edit.

rf_ic_setup

Anonymous (anonymous@undisclosed.example.com) — 2016-09-17T21:16:50+0000

EDA Tools Setup for ECE 697/613 RF and mm-Wave IC Design Course Coming soon.

rfic

Anonymous (anonymous@undisclosed.example.com) — 2018-11-23T22:26:02+0000

Cadence Setup for ECE 5/413: Radio Frequency IC Design Login to the ENGR server ece-ecegrad.ece.uidaho.edu using X2Go+Mate Client. Linux and Mac users can use ssh instead of the X2Go client. They can do this with ssh -XY [username]@ece-ecegrad.ece.uidaho.edu

spectre_faqs

Anonymous (anonymous@undisclosed.example.com) — 2017-10-18T09:12:28+0000

Spectre FAQs ADE/Spectre Basic FAQs * How do I Set up the Spectre models for C5 process * How do I run spectre simulations in /tmp by default * How do I use ADE XL/GXL for corner simulations and parameter sweeps * How do I run the CMOSedu examples on AMS servers * How do we set the initial voltage on a node in Cadence ADE/Spectre Advanced FAQs * I get ABbnNetlistProc Error when trying to run or netlist the schematic

ssh_x11

Anonymous (anonymous@undisclosed.example.com) — 2024-08-30T22:02:10+0000

X11 Forwarding over SSH Linux and Mac users can directly use ssh instead of the X2Go client. Mac users will need to install the XQuartz software. Use the following command ssh -XY [username]@cpeg424.ece.udel.edu There are couple of different SSH Clients available for

start

Anonymous (anonymous@undisclosed.example.com) — 2021-08-31T05:22:46+0000

This wiki provides information for students taking IC design courses at the University of Delaware and using ECE Virtual Machines (VMs) for their class work. The courses are listed here and the course material is available on Canvas. Remote Access Setup

vlsi_course

Anonymous (anonymous@undisclosed.example.com) — 2019-04-13T01:55:24+0000

Cadence Setup for ECE 445: Introduction to VLSI Design Graduate students login to the server ece-ecegrad.ece.uidaho.edu and undergraduates should log into Graduate students login to the server ece-ece310.ece.uidaho.edu using X2Go+Mate Client. Linux and Mac users can use ssh instead of the X2Go client. They can do this with

vnc_install

Anonymous (anonymous@undisclosed.example.com) — 2021-09-05T03:13:04+0000

VNC Remote Connection Setup There are couple of different SSH Clients available for Windows. You can use either use Bitvise or Putty ssh clients. Bitvise SSH Client * Download and install Bitvise SSH client from https://www.bitvise.com/ssh-client-download * From your SSH client, connect to

vpn_client

Anonymous (anonymous@undisclosed.example.com) — 2016-09-17T21:16:50+0000

VPN Client Setup VPN Policies Before you start using the VPN please review and accept the terms listed in the Information Technology Resource policy posted on the following webpages: VPN Setup Directions The VPN system uses the 'Ci…

why_do_we_use_cadence_or_why_can_t_we_use_other_tools

Anonymous (anonymous@undisclosed.example.com) — 2016-09-17T21:16:50+0000

Why do we use Cadence? Ability to use Cadence or similar tools from Mentor Graphics is an important learning objective of the integrated circuit design courses. There are plenty of tools available for free and are easy to use, but you can not reliably design, simulate and fabricate a high-performance chip using them.

x2go_install

Anonymous (anonymous@undisclosed.example.com) — 2021-08-26T00:26:28+0000

X2Go Client Setup Based on instructions from UCSB. The X2Go client provides a fast remote desktop to our servers, with disconnect and resume capability. Instructions * Download and install the latest version of the x2go Client from . If the latest version doesn't work for your Windows