Cad Wiki for Analog IC Courses

Login to the ENGR server ece-ecegrad.ece.uidaho.edu using X2Go+Mate Client. Linux and Mac users can use ssh instead of the X2Go client. They can do this with

 ssh -XY [username]@ece-ecegrad.ece.uidaho.edu 

0) Open the .bashrc file in your home directory

cd
gedit .bashrc

Add the following lines to the .bashrc file in your home directory

export CDSDIR=/usr/local/cadence/installs/IC617
export CDK_DIR=/home/vsaxena/pdk/ncsu-cdk-1.6.0.beta

Refresh the bash shell

source .bashrc

1) Copy the .cdsenv file into your home directory.

cp    /home/vsaxena/pdk/ncsu-cdk-1.6.0.beta/cdssetup/.cdsenv  .cdsenv

2) Create and go to your course work directory e.g. ece515. Better create a new directory for every course.

cd
mkdir ece515
cd ece515

3) If you have existing files, save backups of the files below

cp .cdsinit  .cdsinit_bkp 
cp cds.lib  cds.lib_bkp 

4) Copy .cdsinit from the NCSU setup directory using the command below to your into ece515 directory

cp    /home/vsaxena/pdk/ncsu-cdk-1.6.0.beta/cdssetup/.cdsinit  .cdsinit

5) If you dont have an existing cds.lib file, then copy the cds.lib file using the following command and skip to the next step:

cp    /home/vsaxena/pdk/ncsu-cdk-1.6.0.beta/cdssetup/cds.lib  cds.lib

If you have an existing cds.lib file, then merge the cds.lib file from (/home/vsaxena/pdk/ncsu-cdk-1.6.0.beta/cds.lib) with your existing cds.lib in the directory. This is equivalent to copying the following entries (note that CDK_DIR variable should be defined as in the first line below):

# Include basic Spectre and Verilog-A libraries
DEFINE basic    $CDSDIR/tools/dfII/etc/cdslib/basic
DEFINE analogLib $CDSDIR/tools/dfII/etc/cdslib/artist/analogLib
DEFINE functional    $CDSDIR/tools/dfII/etc/cdslib/artist/functional
DEFINE sbaLib    $CDSDIR/tools/dfII/etc/cdslib/artist/sbaLib
DEFINE ahdlLib $CDSDIR/tools/dfII/samples/artist/ahdlLib
DEFINE bmslib $CDSDIR/tools/dfII/samples/artist/bmslib


6) You should be ready to start Cadence Virtuoso now!

<code>
virtuoso &

Simulation models are located in the following directory on the ece410.engr.uidaho.edu server.

 /home/vsaxena/analog_design/models/ 

We will use IBM 9SF 90nm low-leakage CMOS Process courtesy Prof. Sankaran Aniruddhan from IIT Madras. In the model noise parameters have been added manually from some other process.

The course uses a combination of long-channel (1um) and short-channel (180nm or 0.18um) CMOS models.

You should instantiate the 'nbsim4' and 'pbsim4' devices from analogLib and point them to 'CMOSN' and 'CMOSP' models respectively. The above spectre model is all that you need to include in your simulation setup.

I-V and Parametric Sweeps - Thanks to Jubayer!