First time login into the AMS (Analog Mixed Signal Lab) servers
Closely follow the following steps to setup Cadence for the ECE5/410 class:
Log into ams1 or ams2 servers using the directions
here and open a terminal window.
yppasswd
cd ..
chmod –R 700 <youraccount>
Example: chmod –R 700 vsaxena
You are equally responsible if anyone else copies your files and submits as his own. Make sure you change the password and ensure that others don't have read permission of your home directory.
cd
cp ../5410grader/.bashrc ./
source .bashrc
Setting up the course directory
cp –r ../5410grader/ece510 ./
chmod 700 ece510
Using Cadence
cd ece510
virtuoso &
Your Cadence environment is already set up to start Cadence IC610 version. You need to start Cadence from ece510 directory for the default setups to work.
Always start Cadence in the ece510 directory.
When prompted for license checkout for any of the tools, always use the “Always” option. Clicking Never will disable the license checkout.
Making CMOS Book examples work
To ensure that the CMOS book examples run seamlessly in you work directory, once for all, do the following:
cd
ln -s /home/pdks/Cadence_IC61_CMOSedu CMOSedu
Please do not re-download the Book examples and/or install the NCSU PDK as directed in the CMOSEdu tutorials. They are already installed and available for you in your course directory and can be seen in the Library Manager.
Spectre models location on the servers
/home/pdks/ncsu-cdk-1.6.0.beta/models/spectre/standalone
For On Semi C5 process: Select the models ami06N.m and ami06P.m in the ADE window models setup.
/home/vsaxena/analog_design/models
Basic instructions for simulating CMOS book examples using Cadence Spectre (refer to the Cadence Tutorials for details):
With Cadence running, use the Library Manager to open the schematic view of a cell for simulation using Virtuoso Schematic Editor (SE)
You may not have write permission to run the schematics. You can create a local copy of the library using the Library Manager view and then work on the local copy of the library.
In the menu of the SE Window select Launch → ADE L to open the Virtuoso Analog Design Environment (ADE) Window. Use the ‘Always’ option when prompted for license.
In the ADE Window’s menu select Setup → Simulator/Directory/Host… and then set the Simulator menu item
For most simulations Spectre will be used, if UltraSim or some other simulator is used it will be noted on the schematic. In your environment, Spectre should already be set up as the default simulator.
Next, again in the ADE Window’s menu, select Session → Load State
Finally, in the ADE Window’s menu select Simulation → Netlist and Run (or just hit the green button) to simulate.
Use the MOSIS Scalable CMOS (SCMOS)
SUBM design rules for your ece510 layouts. The design rules can be found in this
document. Note that the design rules are given in terms of lambda (=0.3u) while Cadence Virtuoso uses absolute values without any scaling. Thus in your layouts, multiply all design rule numbers by 0.3u for final layout dimensions. Eg. the minimum N-well width of 12 translates into 12*0.3u=3.6u in Virtuoso layout.
/home/pdks/ncsu-cdk-1.6.0.beta/models/spectre/
In this directory, you should see 5 folders corresponding to each of the corner models: (nom)inal, (slow)-slow, (fast)-fast, slow_fast and fast_slow. Point to the models in these folders for your corner sims.
* MOSIS information for the C5 0.5u process is available here.