=====EDA Tools Setup for ECE 5/417: Mixed Signal IC Design =====

Login to the ENGR server **ece410.engr.uidaho.edu** using X2Go Client.

==== Setting up NCSU Library ==== 

1) Goto your work directory. Better create a new directory for every course.
<code>
cd
mkdir ece517
cd ece517
</code>

2)  Save backups of files
<code>
cp .cdsinit  .cdsinit_bkp 
cp cds.lib  cds.lib_bkp 
</code>

3)  Merge the cds.lib file from (/home/vsaxena/pdk/ncsu-cdk-1.6.0.beta/cds.lib) with your existing cds.lib in the directory. This is equivalent to copying the following entries (note that CDK_DIR variable should be defined as in the first line below):

<code>
# NCSU Design Kit Path
CDK_DIR = "/home/vsaxena/pdk/ncsu-cdk-1.6.0.beta"

# Include basic Spectre and Verilog-A libraries
DEFINE basic    $CDSDIR/tools/dfII/etc/cdslib/basic
DEFINE analogLib $CDSDIR/tools/dfII/etc/cdslib/artist/analogLib
DEFINE functional    $CDSDIR/tools/dfII/etc/cdslib/artist/functional
DEFINE sbaLib    $CDSDIR/tools/dfII/etc/cdslib/artist/sbaLib
DEFINE ahdlLib $CDSDIR/tools/dfII/samples/artist/ahdlLib
DEFINE bmslib $CDSDIR/tools/dfII/samples/artist/bmslib

# Include NCSU PDK
DEFINE basic $CDK_DIR/lib/basic
DEFINE NCSU_Analog_Parts $CDK_DIR/lib/NCSU_Analog_Parts
DEFINE NCSU_Digital_Parts $CDK_DIR/lib/NCSU_Digital_Parts
--DEFINE MOSIS_Layout_Test $CDK_DIR/lib/MOSIS_Layout_Test
DEFINE NCSU_TechLib_ami06 $CDK_DIR/lib/NCSU_TechLib_ami06
DEFINE NCSU_TechLib_ami16 $CDK_DIR/lib/NCSU_TechLib_ami16
DEFINE NCSU_TechLib_hp06 $CDK_DIR/lib/NCSU_TechLib_hp06
DEFINE NCSU_TechLib_tsmc02 $CDK_DIR/lib/NCSU_TechLib_tsmc02
DEFINE NCSU_TechLib_tsmc02d $CDK_DIR/lib/NCSU_TechLib_tsmc02d
DEFINE NCSU_TechLib_tsmc03 $CDK_DIR/lib/NCSU_TechLib_tsmc03
DEFINE NCSU_TechLib_tsmc03d $CDK_DIR/lib/NCSU_TechLib_tsmc03d
DEFINE NCSU_TechLib_tsmc04_4M2P $CDK_DIR/lib/NCSU_TechLib_tsmc04_4M2P
</code>

You should be ready to go now!
<code>
cadsetup
virtuoso
</code>

==== Setting up 180nm CMOS Simulation Models ====
{{:wiki:180nm_models_setup.pdf|}}