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rfic [2018/11/23 22:19]
vsaxena [90nm CMOS Models]
rfic [2018/11/23 22:26] (current)
vsaxena [Setting up Cadence Libraries]
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 </​code>​ </​code>​
  
-All work by the user should be performed in this circuit design directory.+All work by the user should be performed in this circuit design ​directory. You can start Cadence Virtuoso by using the following command in your work directory.
  
-2)  We will use the **45nm CMOS GPDK** from Cadence ​in this course. Create a "​cds.lib"​ file. Using any text editor the following entry should be put in the cds.lib file:+<​code>​ 
 +virtuoso & 
 +</​code>​ 
 + 
 + 
 +<note important>​You should always start virtuoso in you ece513 course directory. </​note>​ 
 + 
 + 
 +===== Creating a new Library ===== 
 + 
 +The Library techfile contains all required techfile information.  
 + 
 +To create a new library that uses an attached techfile, ​use the command ​**File->​New->​Library** from either the CIW or library manager and select the **Attach to an existing techfile** option.  
 + 
 +For 45nm CMOS, select the **gpdk045** library when asked for the name of the Attach To Technology Library. 
 + 
 +When using model files directly (such as 90nm CMOS in this course), select the default **cdsDefTechLib** library when prompted to Attach To Technology Library. 
 +===== Simulation Models ===== 
 + 
 +==== 45nm CMOS Models ==== 
 + 
 +1) Create a "​cds.lib"​ file. Using any text editor the following entry should be put in the cds.lib file:
  
 <​code>​ <​code>​
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 </​code>​ </​code>​
  
-3) Use the command in the terminal to create a softlink to the models directory+2) Use the command in the terminal to create a softlink to the models directory
  
 <​code>​ <​code>​
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 </​code>​ </​code>​
  
-4) You should be ready to start Cadence Virtuoso now!+3) You should be ready to start Cadence Virtuoso now!
  
 <​code>​ <​code>​
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 </​code>​ </​code>​
  
- +4) You can find the PDK documentation at 
-<note important>​You should always start virtuoso in you ece513 course directory. </​note>​ +
- +
-5) You can find the PDK documentation at +
 <​code>​ <​code>​
 /​home/​vsaxena/​pdk/​gpdk045_v_5_0/​docs /​home/​vsaxena/​pdk/​gpdk045_v_5_0/​docs
 </​code>​ </​code>​
  
-===== Creating a new Library ===== 
-The GPDK045 Library techfile will be designated as the master techfile. This techfile will contain all required techfile information. ​ 
- 
-To create a new library that uses an attached techfile, use the command **File->​New->​Library** from either the CIW or library manager and select the **Attach to an existing techfile** option. Select the gpdk045 library 
-when asked for the name of the Attach To Technology Library. 
  
-===== Simulation Models ===== 
- 
-==== 45nm CMOS Models ==== 
 If you have setup everything correctly, simulation models should be automatically loaded. However, they can be found at:  If you have setup everything correctly, simulation models should be automatically loaded. However, they can be found at: 
  
rfic.1543011589.txt.gz · Last modified: 2018/11/23 22:19 by vsaxena