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mixed_signal [2017/03/03 03:57] vsaxena |
mixed_signal [2017/08/19 08:54] (current) vsaxena |
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| =====EDA Tools Setup for ECE 5/417: Mixed Signal IC Design ===== | =====EDA Tools Setup for ECE 5/417: Mixed Signal IC Design ===== | ||
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| + | Login to the ENGR server **ece410.engr.uidaho.edu** using X2Go Client. | ||
| ==== Setting up NCSU Library ==== | ==== Setting up NCSU Library ==== | ||
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| <code> | <code> | ||
| + | # NCSU Design Kit Path | ||
| CDK_DIR = "/home/vsaxena/pdk/ncsu-cdk-1.6.0.beta" | CDK_DIR = "/home/vsaxena/pdk/ncsu-cdk-1.6.0.beta" | ||
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| + | # Include basic Spectre and Verilog-A libraries | ||
| + | DEFINE basic $CDSDIR/tools/dfII/etc/cdslib/basic | ||
| + | DEFINE analogLib $CDSDIR/tools/dfII/etc/cdslib/artist/analogLib | ||
| + | DEFINE functional $CDSDIR/tools/dfII/etc/cdslib/artist/functional | ||
| + | DEFINE sbaLib $CDSDIR/tools/dfII/etc/cdslib/artist/sbaLib | ||
| + | DEFINE ahdlLib $CDSDIR/tools/dfII/samples/artist/ahdlLib | ||
| + | DEFINE bmslib $CDSDIR/tools/dfII/samples/artist/bmslib | ||
| + | |||
| # Include NCSU PDK | # Include NCSU PDK | ||
| DEFINE basic $CDK_DIR/lib/basic | DEFINE basic $CDK_DIR/lib/basic | ||